Technical Field
Embodiments described herein relate to computing devices and, more particularly, to network communication.
Description of the Related Art
Asynchronous (or self-timed) circuits may be incorporated into computing systems and devices for performing various operations. In contrast to synchronous circuits which use global clocks to control the functioning of the circuits, asynchronous circuit components do not rely on such a reference signal (e.g., global clock) to stay synchronized with other components. Rather, asynchronous circuits generally utilize other signals to indicate if and when actions are to be taken. As such, asynchronous circuits may have multiple components which synchronize packets at their own rate.
When transmitting messages in a computing system (e.g., network, or otherwise), the messages may be broken up into one or more packets before transmission. Each of these packets typically includes a header and a payload. These packets may in turn be broken up into smaller pieces or units. In various embodiments, these smaller packet pieces may be referred to as flow control units/digits, or “flits”. In various embodiments, the first flit of a packet may be at least a portion of a packet header (“head flit”) that includes information about the packet's route (e.g., the destination address). Additionally, the head flit may include information that sets up the routing behavior for subsequent flits of the packet. The head flit may be followed by one or more body flits which contain the actual payload of data. The final flit of a packet, which may be referred to as a “tail flit”, may be used to close a connection between two routers.
Asynchronous components can offer significant advantages over traditional clocked circuits in a variety of applications, including Network-on-chip (NoC) applications. Typically, an NoC interconnects components of a computing system (e.g., processors, memory elements, etc.) and provide a means of communication between these components. The self-timed nature of the NoC simplifies the design of the NoC and may improve both performance and power consumption. One important function of an NoC is to properly route packets. Often a router circuit is included in the NoC that performs this function and directs packets of information as needed. With the increasing complexity of circuits, it may be difficult to achieve the desired power and timing characteristics when using synchronous circuits. Consequently, asynchronous circuits that can offer advantages in performance, power consumption, and/or scalability may be seen as a desirable option.